CORRADO DE SIO
Pubblicazioni più recenti
Portaluri, Andrea; De Sio, Corrado; Azimi, Sarah; Sterpone, Luca (In stampa)
SEU Mitigation on SRAM-based FPGAs through Domains-based Isolation Design Flow. In: IEEE Radiation and its Effects on Components and Systems 2021
SEU Mitigation on SRAM-based FPGAs through Domains-based Isolation Design Flow. In: IEEE Radiation and its Effects on Components and Systems 2021
Azimi, Sarah; De Sio, Corrado; Sterpone, Luca (In stampa)
Analysis of Radiation-induced Transient Errors on 7nm FinFET Technology. In: MICROELECTRONICS RELIABILITY. ISSN 0026-2714
Analysis of Radiation-induced Transient Errors on 7nm FinFET Technology. In: MICROELECTRONICS RELIABILITY. ISSN 0026-2714
De Sio, Corrado; Azimi, Sarah; Portaluri, Andrea; Sterpone, Luca (2021)
SEU Evaluation of Hardened-by-Replication Software in RISC-V Soft Processor. In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)
SEU Evaluation of Hardened-by-Replication Software in RISC-V Soft Processor. In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)
Azimi, Sarah; De Sio, Corrado; Sterpone, Luca (2021)
On the Evaluation of SEEs on Open-Source Embedded Static RAMs. In: IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
On the Evaluation of SEEs on Open-Source Embedded Static RAMs. In: IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
Portaluri, Andrea; De Sio, Corrado; Azimi, Sarah; Sterpone, Luca (2021)
A New Domains-based Isolation Design Flow for Reconfigurable SoCs. In: IEEE International Symposium on On-Line Testing and robust System Design (IOLTS 2021), pp. 1-6
A New Domains-based Isolation Design Flow for Reconfigurable SoCs. In: IEEE International Symposium on On-Line Testing and robust System Design (IOLTS 2021), pp. 1-6
Bozzoli, L.; De Sio, C.; Du, B.; Sterpone, L. (2021)
A Neutron Generator Testing Platform for the Radiation Analysis of SRAM-based FPGAs. In: IEEE International Instrumentation and Measurement Technology Conference (I2MTC), Glasgow, United Kingdom, 17-20 May 2021, pp. 1-5. ISBN: 978-1-7281-9539-1
A Neutron Generator Testing Platform for the Radiation Analysis of SRAM-based FPGAs. In: IEEE International Instrumentation and Measurement Technology Conference (I2MTC), Glasgow, United Kingdom, 17-20 May 2021, pp. 1-5. ISBN: 978-1-7281-9539-1
Azimi, Sarah; De Sio, Corrado; Sterpone, Luca (2021)
A Radiation-Hardened CMOS Full-Adder Based on Layout Selective Transistor Duplication. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 29, pp. 1596-1600. ISSN 1063-8210
A Radiation-Hardened CMOS Full-Adder Based on Layout Selective Transistor Duplication. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol. 29, pp. 1596-1600. ISSN 1063-8210
Azimi, Sarah; De Sio, Corrado; Sterpone, Luca (2021)
A 3-D LUT Design for Transient Error Detection Via Inter-Tier In-Silicon Radiation Sensor. In: Design, Automation and Test in Europe Conference (DATE2021), February 2021, pp. 1-6
A 3-D LUT Design for Transient Error Detection Via Inter-Tier In-Silicon Radiation Sensor. In: Design, Automation and Test in Europe Conference (DATE2021), February 2021, pp. 1-6
Azimi, Sarah; Du, Boyang; De Sio, Corrado; Sterpone, Luca (2020)
On the Mitigation of Single Event Transient in 3D LUT by In-Cell Layout Resizing. In: 31th IEEE Radiation and its Effects on Components and System (RADECS), pp. 1-4
On the Mitigation of Single Event Transient in 3D LUT by In-Cell Layout Resizing. In: 31th IEEE Radiation and its Effects on Components and System (RADECS), pp. 1-4
De Sio, Corrado; Azimi, Sarah; Sterpone, Luca (2020)
An Emulation Platform for Evaluating the Reliability of Deep Neural Network. In: The 33th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology (DFT 2020), pp. 1-4
An Emulation Platform for Evaluating the Reliability of Deep Neural Network. In: The 33th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology (DFT 2020), pp. 1-4
De Sio, C.; Azimi, S.; Sterpone, L. (2020)
On the Analysis of Radiation-induced Failures in the AXI Interconnect Module. In: MICROELECTRONICS RELIABILITY, pp. 113733-113738. ISSN 0026-2714
On the Analysis of Radiation-induced Failures in the AXI Interconnect Module. In: MICROELECTRONICS RELIABILITY, pp. 113733-113738. ISSN 0026-2714
De Sio, C.; Azimi, S.; Sterpone, L. (2020)
On the evaluation of SEU effects on AXI interconnect within AP-SoCs. In: 33rd International Conference on Architecture of Computing Systems, ARCS 2020, deu, 2020, pp. 215-227. ISSN 0302-9743. ISBN: 978-3-030-52793-8
On the evaluation of SEU effects on AXI interconnect within AP-SoCs. In: 33rd International Conference on Architecture of Computing Systems, ARCS 2020, deu, 2020, pp. 215-227. ISSN 0302-9743. ISBN: 978-3-030-52793-8
Azimi, Sarah; De Sio, Corrado; Sterpone, Luca (2020)
In-Circuit Mitigation Approach of Single Event Transients for 45nm Flip-Flops. In: 26th IEEE International Symposium on On-Line Testing and robust System Design (IOLT 2020), pp. 1-6
In-Circuit Mitigation Approach of Single Event Transients for 45nm Flip-Flops. In: 26th IEEE International Symposium on On-Line Testing and robust System Design (IOLT 2020), pp. 1-6
Azimi, Sarah; De Sio, Corrado; Yang, Weitao; Sterpone, Luca (2020)
A New Single Event Transient Hardened Floating Gate Configurable Logic Circuit. In: 18th IEEE International NEWCAS, Montreal, Canada, June 16-19, 2020, pp. 311-314
A New Single Event Transient Hardened Floating Gate Configurable Logic Circuit. In: 18th IEEE International NEWCAS, Montreal, Canada, June 16-19, 2020, pp. 311-314
De Sio, C.; Azimi, S.; Bozzoli, L.; Du, B.; Sterpone, L. (2019)
Radiation-induced Single Event Transient effects during the reconfiguration process of SRAM-based FPGAs. In: MICROELECTRONICS RELIABILITY. ISSN 0026-2714
Radiation-induced Single Event Transient effects during the reconfiguration process of SRAM-based FPGAs. In: MICROELECTRONICS RELIABILITY. ISSN 0026-2714
Du, Boyang; Azimi, Sarah; De Sio, Corrado; Bozzoli, Ludovica; Sterpone, Luca (2019)
On the Reliability of Convolutional Neural Network Implementation on SRAM-based FPGA. In: The 32nd IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology, ESA-ESTEC & TU Delft, Netherlands, 02/10/2019 - 04/10/2019
On the Reliability of Convolutional Neural Network Implementation on SRAM-based FPGA. In: The 32nd IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology, ESA-ESTEC & TU Delft, Netherlands, 02/10/2019 - 04/10/2019
Sterpone, Luca; Bozzoli, Ludovica; DE SIO, Corrado; Du, Boyang; Azimi, Sarah (2019)
Analysis of Radiation-induced SETs in 3D VLSI Face-to-Back LUTs. In: 30th IEEE Radiation and its Effects on Components and Systems (RADECS 2019)
Analysis of Radiation-induced SETs in 3D VLSI Face-to-Back LUTs. In: 30th IEEE Radiation and its Effects on Components and Systems (RADECS 2019)
Sterpone, Luca; Bozzoli, Ludovica; DE SIO, Corrado; Du, Boyang; Azimi, Sarah (2019)
A new Method for the Analysis of Radiation-induced Effects in 3D VLSI Face-to-Back LUTs. In: IEEE International Conference on Synthesis, modeling, analysis and Simulation methods and applications to circuit design (SMACD)
A new Method for the Analysis of Radiation-induced Effects in 3D VLSI Face-to-Back LUTs. In: IEEE International Conference on Synthesis, modeling, analysis and Simulation methods and applications to circuit design (SMACD)
Odintsov, Sergei; Bozzoli, Ludovica; De Sio, Corrado; Sterpone, Luca; Jutman, Artur (2019)
A new FPGA-based Detection Method for Spurious Variations in PCBA Power Distribution Network. In: IEEE DDECS 2019, pp. 1-6. ISBN: 978-1-7281-0073-9
A new FPGA-based Detection Method for Spurious Variations in PCBA Power Distribution Network. In: IEEE DDECS 2019, pp. 1-6. ISBN: 978-1-7281-0073-9
de sio, Corrado; Azimi, Sarah; Sterpone, Luca (2019)
On the Evaluation of the PIPB Effect within SRAM-based FPGAs. In: 2019 IEEE European Test Symposium (ETS2019)
On the Evaluation of the PIPB Effect within SRAM-based FPGAs. In: 2019 IEEE European Test Symposium (ETS2019)