MARCO PALENA

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Visiting Staff - Borsa di studio per attività di ricerca non tassata
Adjunct Professor

Most recent publications

Cabodi, Gianpiero; Camurati, Paolo; Palena, Marco; Pasini, Paolo (2021)
Optimizing Binary Decision Diagrams for Interpretable Machine Learning Classification. In: Design Automation and Test in Europe (DATE), 01/02/2021, pp. 1122-1125
Cabodi, G.; Camurati, P. E.; Palena, M.; Pasini, P.; Vendraminetto, D. (2019)
Reducing interpolant circuit size through SAT-based weakening. In: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS. ISSN 0278-0070
Cabodi, G.; Camurati, P. E.; Palena, M.; Pasini, P.; Vendraminetto, D. (2019)
Logic Synthesis for Interpolant Circuit Compaction. In: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, vol. 38, pp. 380-384. ISSN 0278-0070
Cantoro, Riccardo; Ghani Zadegan, Farrokh; Palena, Marco; Pasini, Paolo; Larsson, Erik; ... (2018)
Test of Reconfigurable Modules in Scan Networks. In: IEEE TRANSACTIONS ON COMPUTERS, pp. 1-1. ISSN 0018-9340 Download fulltext
Cabodi, Gianpiero; Camurati, Paolo Enrico; Loiacono, Carmelo; Palena, Marco; Pasini, ... (2018)
To Split or to Group: From Divide-and-Conquer to Sub-Task Sharing for Verifying Multiple Properties in Model Checking. In: INTERNATIONAL JOURNAL ON SOFTWARE TOOLS FOR TECHNOLOGY TRANSFER, vol. 20, pp. 313-325. ISSN 1433-2779
Palena, Marco (2017)
Exploiting Boolean Satisfiability Solvers for High Performance Bit-Level Model Checking. relatore: Cabodi G., 28. XXVIII Ciclo, P.: 159
Cabodi, Gianpiero; Camurati, Paolo Enrico; Palena, Marco; Pasini, Paolo; Vendraminetto, ... (2017)
Interpolation-based learning as a mean to speed-up Bounded Model Checking. In: 15th International Conference on Software Engineering and Formal Methods, Trento (Italy), September 4-8, 2017
PALENA, MARCO; PASINI, PAOLO; CABODI, Gianpiero; CAMURATI, Paolo Enrico; Mishchenko, Alan (2017)
SAT solver management strategies in IC3: an experimental approach. In: FORMAL METHODS IN SYSTEM DESIGN, vol. 50, pp. 39-74. ISSN 0925-9856
Cantoro, Riccardo; Palena, Marco; Pasini, Paolo; Sonza Reorda, Matteo (2016)
Test Time Minimization in Reconfigurable Scan Networks. In: 2016 IEEE 25th Asian Test Symposium (ATS), Hiroshima (JP), November 21-24, 2016 Download fulltext
Cabodi, Gianpiero; Camurati, Paolo Enrico; Palena, Marco; Pasini, Paolo; Vendraminetto, ... (2016)
Reducing Interpolant Circuit Size by Ad Hoc Logic Synthesis and SAT-Based Weakening. In: Formal Methods in Computer-Aided Design, Mountain View, California, USA, October 3 - 6, 2016, pp. 25-32. ISBN: 978-0-9835678-6-8 Download fulltext
Boria, Nicolas; Cabodi, Gianpiero; Camurati, Paolo Enrico; Palena, Marco; Pasini, Paolo; ... (2016)
A 7/2-approximation algorithm for the Maximum Duo-Preservation String Mapping Problem. In: 27th Annual Symposium on Combinatorial Pattern Matching, Tel Aviv, Israel, June 27 - 29, 2016
Cabodi, G.; Loiacono, C.; Palena, M.; Pasini, P.; Quer, S.; Patti, D.; Vendraminetto, ... (2016)
Hardware Model Checking Competition 2014: An Analysis and Comparison of Model Checkers and Benchmarks. In: JOURNAL ON SATISFIABILITY, BOOLEAN MODELING AND COMPUTATION, vol. 9, pp. 135-172. ISSN 1574-0617
Gianpiero Cabodi; Marco Palena; Paolo Pasini (2014)
Interpolation with Guided Refinement: revisiting incrementality in SAT-based Unbounded Model Checking. In: Formal Methods in Computer-Aided Design (FMCAD 2014), Lausanne, Switzerland, 21-24 Oct. 2014, pp. 43-50
G.Cabodi; A.Mishchenko; M.Palena (2013)
Trading-off Incrementality and Dynamic Restart of Multiple Solvers in IC3. In: International Workshop on Design and Implementation of Formal Tools and Systems, Portland, OR, 19 Ottobre 2013
Loiacono, C.; Palena, M.; Pasini, P.; Patti, D.; Quer, S.; Vendraminetto, D.; ... (2013)
Fast Cone-Of-Influence Computation and Estimation in Problems with Multiple Properties. In: Published in: Design, Automation & Test in Europe Conference & Exhibition (DATE), Grenoble, France, March 2013, pp. 803-806. ISBN: 978-1-4673-5071-6
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